1. Field of the Invention
The present invention relates to radio communication apparatuses and amplifiers (radio frequency power modules) incorporated in radio communication apparatuses and, more particularly, to a technique which is advantageously applied to techniques capable of improving amplification efficiency in a low power mode.
2. Description of the Prior Art
An amplifier (RF power module) including a multiplicity of stages of MOSFETs, GaAs MESFETs or the like is incorporated in an output stage at the transmission end of a transmitter of a radio communication apparatus (mobile communication apparatus) such as a mobile phone or portable telephone.
In general, a portable telephone has a system configuration which enables communication with its output varied in adaptation to the environment in accordance with a power level instruction signal from a base station so as not to cause interruption with other portable telephones.
Radio frequency power amplifiers (RF power amplifier circuits) are discussed on pages 115-126 of xe2x80x9cNikkei Electronicsxe2x80x9d Jan. 27, 1997, issued by Nikkei BP. This article discusses standard systems of 900 MHz band cellular type portable telephones in the United States and the GSM system in Europe. This article also discusses output control systems and it states xe2x80x9ca widely used output control method is to vary the magnitude of an input signal to the final stage of a transmitter using a programmable attenuator with the gain of the final stage kept constant.
The same article also says xe2x80x9cusers regard the capability of a portable telephone to communicate a remote base station as important as the life of the battery regardless of the system of the same. All standards for cellular type portable telephones define an output range, and designers had better design telephones which can provide an output close to the allowable maximum output.
A radio frequency power amplifier (radio frequency power amplifier circuit) at the output stage of the transmission end of a cellular type portable telephone has a configuration in which the output is controlled by an APC (automatic power control) circuit and in which a gate voltage is controlled to provide an output as required for a call.
Since the power amplifier circuit has the best power source efficiency at the maximum output thereof, an abrupt reduction in the power supply efficiency occurs when the power amplifier circuit has a low output level. Therefore, the power supply efficiency is low when the telephone is used at a low output level, e.g., when it is used in the vicinity of a base station, which causes consumption of the battery at a high rate to shorten the life of the battery. This reduces call time per battery.
Conventional radio frequency power amplifiers suffer from deterioration of linearity and AM/AM characteristics (AM/AM conversion) at a low output (e.g., +5 dBm) because the gate bias of a power MOS at the final stage thereof is simply decreased.
It is an object of the invention to provide a radio frequency power amplifier and a radio communication apparatus which operate with high amplifying efficiency regardless of the output level.
It is another object of the invention to provide a radio frequency power amplifier and a radio communication apparatus which operate with high amplifying efficiency regardless of the output level and which has preferable linearity and AM/AM characteristics at a low output.
It is still another object of the invention to provide a radio frequency power amplifier and a radio communication apparatus which can provide a long call time and a long battery life.
The above and other objects and features of the present invention will be understood from the description of this specification and the accompanying drawing.
Typical aspects of the invention disclosed in this specification will now be briefly described.
While a field effect transistor (FET) will be disclosed below as an example of a semiconductor amplifying element, semiconductor amplifying elements are not limited to field effect transistors, and bipolar transistors, heterojunction bipolar transistors (HBT), high-electron-mobility transistors (HEMT) and the like are also included. Further, semiconductor substrates for forming semiconductor amplifying elements thereon are not limited to silicon substrates, and silicon-germanium substrates, gallium arsenic substrates and the like are also included.
(1) There is provided a semiconductor amplifier circuit formed by assembling a plurality of field effect transistors into a multiplicity of stages, which includes a correction circuit for controlling a bias voltage applied to the gate electrode of the field effect transistor at the final stage. A bias voltage applied to the field effect transistor at each stage is supplied through a power control terminal. When an automatic power control (APC) circuit instructs a high power mode, the correction circuit increases the bias voltage applied to the gate electrode of the field effect transistor of the final stage at a constant increase rate in accordance with an increase in the bias voltage supplied from the power control terminal. When the automatic power control circuit instructs a low power mode, the correction circuit increases the bias voltage applied to the gate electrode of the field effect transistor of the final stage at an increase rate which gradually decreases with the increase of the bias voltage supplied from the power control terminal.
In this case, the semiconductor amplifier circuit has a configuration incorporating a plurality of field effect transistors in the form of a multiplicity of stages and including a correction circuit as described above, an input terminal, an output terminal, a plurality of reference potential terminals, control terminals connected to the gate terminals of the plurality of field effect transistors and a bias switch terminal.
The correction terminal is connected to a node A in a path for applying a bias power supply between the gate electrode of the field effect transistor of the final stage and the automatic power control circuit. The correction circuit is comprised of a correction field effect transistor, a switching field effect transistor and a plurality of resistive elements. The correction field effect transistor is connected to the node A at the drain terminal thereof, to the node A through a resistor at the gate terminal thereof and to a reference potential (Gnd) at the source terminal thereof. The correction field effect transistor and the field effect transistor of the final stage are identical in their structure and are formed on the same semiconductor substrate, and the size of the correction field effect transistor is a reduction of the size of the final stage field effect transistor at a predetermined ratio. The switching field effect transistor is connected to the gate terminal of the correction field effect transistor at the drain terminal thereof, to a bias switch terminal at the gate terminal thereof and to the reference potential (Gnd) at the source terminal thereof.
A signal output by an output power level control circuit is connected to the bias switch terminal.
(2) In the configuration described in the above (1), the output of the automatic power control circuit may be connected to the bias switch terminal to establish a low power mode when the output signal of the automatic power control circuit is lower than a prescribed voltage and a high power mode when it is higher than the prescribed voltage.
In such a configuration, the output of the automatic power control circuit is connected to the bias switch terminal which is connected to the gate terminal of the switching field effect transistor as described in the above (1).
(3) In still another configuration, the correction circuit is not provided; a low power mode and a high power mode are respectively established when the output signal of the automatic power control circuit is lower and higher than a prescribed voltage; and, in the high power mode, bias voltages supplied to the gate terminals of all field effect transistors are supplied as the output signal of the automatic power control circuit. In the low power mode, a predetermined voltage is applied as the bias voltage supplied to the gate terminal of the field effect transistor at the final stage, and the output signal of the automatic power control circuit is supplied as bias voltages to other field effect transistors. In this case, while no special limitation is placed on the bias voltage supplied to the field effect transistor at the final stage except that the voltage should be about 0.5 V lower than the maximum bias voltage supplied to other field effect transistors.
In this case, the semiconductor amplifier circuit has a configuration incorporating a plurality of field effect transistors in the form of a multiplicity of stages and including an input terminal, an output terminal, a plurality of reference potential terminals and control terminals connected to the gate terminals of the plurality of field effect transistors. The control terminals comprise first control terminals connected to the gates of field effect transistors other than the field effect transistor at the final stage and a second control terminal connected to the gates of the field effect transistor at the final stage.
In the configuration described in the above (1),
(a) the gate voltage of each of the field effect transistors can be controlled by the output signal of the automatic power control circuit (APC circuit) based on a power level instruction signal such that a high level signal is input to a node B (bias switch terminal) of the correction circuit in a high power mode to use the gate voltage of each field effect transistor in a linear state and such that a low level signal is input to the bias switch terminal of the correction circuit in a low power mode to use the same in a high state of efficiency (amplifying efficiency) of the field effect transistor at the final stage. This makes it possible to the field effect transistor at the final stage with high improve linearity in the low power mode and AM/AM characteristics and to reduce power consumption thereby expanding the life of the battery. The improved battery life results in an improvement of call time. The reduction in power consumption leads to a reduction of the size of a battery, which makes it possible to reduce the size and weight of a radio communication apparatus.
(b) The field effect transistor at the final stage and the correction field effect transistor have a monolithic configuration, and the correction field effect transistor is in a size which is a reduction of the size of the field effect transistor at the final stage at a predetermined ratio. Therefore, the change in the gate bias voltage caused by the output signal (control signal) from the automatic power control circuit will occur with high accuracy which is in accordance with not only the peak power (maximum gate voltage) but also the slopes of the rise and fall of the transmission output and will be stable against variation in the characteristics of FETs and fluctuations of the same attributable to temperature.
In the aspect as described in the above (2), there is provided a configuration according to the aspect (1) in which the output signal of the automatic power control circuit is input to the node B such that the correction circuit is in a low power mode when the output signal of the automatic power control circuit is lower than a prescribed voltage and in a high power mode when it is higher than the voltage. Thus, the same effects as those in the first aspect can be achieved. Specifically, it is possible to improve linearity of the low power mode and AM/AM characteristics and to reduce power consumption thereby expanding the life of a battery.
According to the third aspect, no correction circuit is provided unlike the first aspect, and all field effect transistors are controlled by an automatic power control circuit in the high power mode and the gate bias of the final stage field effect transistor is kept constant in the low power mode and other field effect transistors are controlled by the automatic power control circuit. Therefore, high efficiency is achieved with improved AM/AM characteristics in the low power mode as in the first aspect, and the life of a battery, i.e., call time is expanded.